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Samsung Showcases New 3D Vertical NAND Flash

By Bryan Chan & Bryan Chan - on 7 Aug 2013, 11:37am

Samsung Showcases New 3D Vertical NAND Flash

Samsung has just introduced the world's first 3D Vertical NAND (V-NAND). This new technology aims to overcome the limitations of existing flash technology, which is storage density and endurance.

Presently, TLC NAND memory sacrifices endurance in exchange for denser memory chips. V-NAND can overcome that by stacking up to 24 individual NAND cells on top of each other. The new V-NAND chips are presently manufactured at a 10nm process size and offers 128Gb per NAND chip.

To mitigate lifespan and endurance issues, the new V-NAND chip uses a technology called Charge Trap Flash (CTF). Traditional NAND memory uses floating gate transistors to store charges, and this causes complexities as manufacturing process shrink. On the other hand, CTF technology places an electric charge within a holding chamber of the non-conductive layer of flash that is composed of silicon nitride so as to reduce interference with adjacent cells.

With both technologies, Samsung is predicting that its new 3D V-NAND can scale up to 1Tb per NAND chip. Write endurance should be at least two times better, with up to ten times being possible.

Although the new memory chips are being manufactured as we speak, there's no word yet on when a consumer-grade SSD utilizing this technology will be available.

Source: Ars Technica